Non-volatile data storage devices have enabled increased portability of data and software applications. For example, multi-level cell (MLC) storage elements of a flash memory device may each store multiple bits of data, enhancing data storage density as compared to single-level cell (SLC) flash memory devices. Consequently, flash memory devices enable users to store and access a large amount of data. As a number of bits stored per cell increases, bit errors in stored data typically increase.
SLC and MLC flash memory devices may use error correcting code (ECC) techniques to correct a number of errors in read data up to a certain error correction capability of the particular ECC technique used to encode the data. If the number of errors exceeds the error correction capability of the particular ECC technique used, an uncorrectable ECC (UECC) error may occur, resulting in data loss. In some cases, error correction capability may be increased by using “soft” information that indicates a probability of bits having a particular bit value. For example, a decoder of a flash memory device may use additional “soft” bits to determine which “hard” bits of read data are likely to be incorrect. Such soft bit techniques may increase error correction capability of a flash memory device but may also use processing resources and/or increase read latency at the flash memory device, which may decrease performance of the flash memory device.